(1) Field of the Invention
The present invention relates to processes used to fabricate semiconductor devices, and more specifically to a process used to simultaneously fabricate a flash memory cell, and peripheral devices.
(2) Description of the Prior Art
The use of flash memory devices allow data to be stored in a non-volatile mode, and allows the stored data to be erased and rewritten as desired. The term flash refers to the ability to erase numerous memory cells simultaneously. However, if more aggressive processes and designs, including the integration of high performing peripheral devices, resulting in smaller cell areas, with increased performance, are not implemented, performance and cost objectives, for flash memory chips, will be difficult to achieve.
This invention will teach a process for creating a self-aligned contact, (SAC), structure, for flash memory cells, resulting in a reduction in cell area, while also teaching a fabrication sequence that easily allows the integration of high performing peripheral devices. The use of the SAC structure removes the need of providing contact holes to source regions, thus saving a photolithographic procedure. In addition the use of the symmetric SAC structure design, used in this invention, will be more conducive to future micro-miniaturization trends, than counterpart flash memory cells, fabricating using conventional contacts to source/drain regions. In addition this invention will teach an integrated process sequence that easily allows the fabrication of salicided, peripheral devices, with the flash memory cells, thus resulting in performance improvements, when compared to counterparts fabricated without the integration of the salicide peripheral devices. Prior art, such as Sung et al, in U.S. Pat. No. 5,631,179, and Ahn, in U.S. Pat. No. 5,652,161, describe processes for fabricating flash memory cells, but neither prior art describe the novel integrated process sequence, used in the present invention, which allows high performing, peripheral devices, to be fabricated in the same process sequence used to create the devices for the flash memory cell.